IS42S32800B Datasheet PDF - Integrated Silicon Solution SYNCHRONOUS DYNAMIC RAM Specs

IS42S32800B - SYNCHRONOUS DYNAMIC RAM

Datasheet Summary

Description

The ISSI IS42S32800B is a high-speed CMOS configured as a quad 2M x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal,CLK).

Features

Concurrent auto precharge.
Clock rate:166/143 MHz.
Fully synchronous operation.
Internal pipelined architecture.
Four internal banks (2M x 32bit x 4bank).
Programmable Mode -CAS#Latency:2 or 3 -Burst Length:1,2,4,8,or full page -Burst Type:interleaved or linear burst -Burst-Read-Single-Write.
Burst stop function.
Individual byte controlled by DQM0-3.
Auto Refresh and Self Refresh.
4096 refresh cycles/64ms (15.6µs/row).
Single +3.3V ±0.3V po.

Datasheet Details

Part number	IS42S32800B
Manufacturer	Integrated Silicon Solution
File Size	0.97 MB
Description	SYNCHRONOUS DYNAMIC RAM
Datasheet	IS42S32800B Datasheet
Additional preview pages of the IS42S32800B datasheet.

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Full PDF Text Transcription

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IS42S32800B 2M Words x 32 Bits x 4 Banks (256-MBIT) SYNCHRONOUS DYNAMIC RAM FEATURES · Concurrent auto precharge · Clock rate:166/143 MHz · Fully synchronous operation · Internal pipelined architecture · Four internal banks (2M x 32bit x 4bank) · Programmable Mode -CAS#Latency:2 or 3 -Burst Length:1,2,4,8,or full page -Burst Type:interleaved or linear burst -Burst-Read-Single-Write · Burst stop function · Individual byte controlled by DQM0-3 · Auto Refresh and Self Refresh · 4096 refresh cycles/64ms (15.6µs/row) · Single +3.3V ±0.3V power supply · Interface:LVTTL · Package: 86 Pin TSOP-2,0.50mm Pin Pitch 8x13mm, 90 Ball BGA, Ball pitch 0.8mm · Pb-free package is available. www.DataSheet4U.

Published: May 3, 2010 |