IS42S32200 Datasheet PDF - ISSI 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM Specs

IS42S32200 - 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM

Datasheet Summary

Description

A0-A10 Address Input BA0, BA1 Bank Select Address I/O0 to I/O31 Data I/O CLK System Clock Input CKE CS Clock Enable Chip Select RAS Row Address Strobe Command CAS WE Column A

Features

Clock frequency: 166, 143 MHz.
Fully synchronous; all signals referenced to a positive clock edge.
Internal bank for hiding row access/precharge.
Single 3.3V power supply.
LVTTL interface.
Programmable burst length.
(1, 2, 4, 8, full page).
Programmable burst sequence: Sequential/Interleave.
Self refresh modes.
4096 refresh cycles every 64 ms.
Random column address every clock cycle.
Prog.

Datasheet Details

Part number	IS42S32200
Manufacturer	ISSI
File Size	957.39 KB
Description	512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
Datasheet	IS42S32200 Datasheet
Additional preview pages of the IS42S32200 datasheet.

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Full PDF Text Transcription

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IS42S32200 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM ISSI® PRELIMINARY INFORMATION August 2003 FEATURES • Clock frequency: 166, 143 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Single 3.

Published: Feb 10, 2018 |