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HD74HC597 - 8-bit Latch/Shift Register

Description

The HD74HC597 consists of an 8-bit storage latch feeding a parallel-in, serial-out 8-bit shift register.

Both the storage register and shift register have positive-edge triggered clocks.

The shift register also has direct load (from storage) and clear inputs.

Features

  • High Speed Operation: tpd (SCK to QH’) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table RCK SCK X X X X X X X X X SLoad X L L L H H SCLR X H H L L H Function Data loaded to input latches Data loaded from inputs to shift register Data transferred from input latches to shift regis.

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HD74HC597 8-bit Latch/Shift Register Description The HD74HC597 consists of an 8-bit storage latch feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and shift register have positive-edge triggered clocks. The shift register also has direct load (from storage) and clear inputs.
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