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HD74ALVCH16374 - 16-bit D-type Flip Flops with 3-state Outputs

Description

The HD74ALVCH16374 has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package.

Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive going transitions of the clock input.

Features

  • VCC = 2.3 V to 3.6 V Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±24 mA (@V CC = 3.0 V) Bus hold on data inputs eliminates the need for external pullup / pulldown resistors. HD74ALVCH16374 Function Table Inputs OE H L L L H: L: X: Z: ↑: Q0 : CK X ↑ ↑ H or L D X L H X Output Q Z L H Q0 High level Low level Immaterial High impedance Low to high transition.

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📁 Similar Datasheet

Part Number Description Manufacturer
HD74ALVCH16374 16-bit D-type Flip Flops Renesas
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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74ALVCH16373 16-bit Transparent D-type Latches with 3-state Outputs
HD74ALVCH16334 16-bit Universal Bus Driver with 3-state Outputs
HD74ALVCH162244 16-bit Buffers / Drivers with 3-state Outputs
HD74ALVCH162260 12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs
HD74ALVCH162270 12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs

Full PDF Text Transcription

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HD74ALVCH16374 16-bit D-type Flip Flops with 3-state Outputs ADE-205-123B (Z) 3rd. Edition December 1999 Description The HD74ALVCH16374 has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive going transitions of the clock input. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
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