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CY7C1325G - 4-Mbit (256K 횞 18) Flow-Through Sync SRAM

Description

The CY7C1325G is a 256K × 18 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic.

Maximum access delay from clock rise is 6.5 ns (133 MHz version).

Features

  • 256K × 18 common I/O.
  • 3.3 V core power supply (VDD).
  • 2.5 V or 3.3 V I/O power supply (VDDQ).
  • Fast clock-to-output times.
  • 6.5 ns (133 MHz version).
  • Provide high performance 2-1-1-1 access rate.
  • User selectable burst counter supporting Intel Pentium interleaved or linear burst sequences.
  • Separate processor and controller address strobes.
  • Synchronous self timed write.
  • Asynchronous output enable.
  • Available in Pb-free 100-pin TQFP package.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY7C1325G 4-Mbit (256K × 18) Flow-Through Sync SRAM 4-Mbit (256K × 18) Flow-Through Sync SRAM Features ■ 256K × 18 common I/O ■ 3.3 V core power supply (VDD) ■ 2.5 V or 3.3 V I/O power supply (VDDQ) ■ Fast clock-to-output times ■ 6.5 ns (133 MHz version) ■ Provide high performance 2-1-1-1 access rate ■ User selectable burst counter supporting Intel Pentium interleaved or linear burst sequences ■ Separate processor and controller address strobes ■ Synchronous self timed write ■ Asynchronous output enable ■ Available in Pb-free 100-pin TQFP package ■ “ZZ” sleep mode option Logic Block Diagram Functional Description The CY7C1325G is a 256K × 18 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.
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