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74HC107 Dual JK flip-flop

74HC107 Description

74HC107; 74HCT107 Dual JK flip-flop with reset; negative-edge trigger Rev.7 * 20 February 2024 Product data sheet 1.General .
The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and compleme.

74HC107 Features

* Wide supply voltage range from 2.0 V to 6.0 V
* CMOS low power dissipation
* High noise immunity
* Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
* Complies with JEDEC standards:
* JESD8C (2.7 V to 3.6 V)
* JESD7A (2.0 V to

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