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74HC109 Dual J-K Positive-Edge-Triggered Flip-Flops

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Description

SN54HC109, SN74HC109 SCLS470C * MARCH 2003 * REVISED JUNE 2022 SNx4HC109 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Pr.
These devices contain two independent J-K positiveedge-triggered flip-flops.

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Features

* Wide operating voltage range of 2 V to 6 V
* Low input current of 1 μA max
* High-current outputs drive up to 10 LSTTL loads
* Low power consumption, 40-μA max ICC
* Typical tpd = 12 ns

Applications

* intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54HC109, SN74HC109 SCLS470C
* MARCH 2003

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