WED3C755E8M-XBX - RISC MICROPROCESSOR MULTI-CHIP PACKAGE

White Electronic Designs Corporation

Datasheet Details

doze, nap, sleep and dynamic power management. The WED3C755E8M-XBX multichip package consists of: 755 RISC processor (E die revision) Dedicated 1MB SSRAM L2 cache, conﬁgured as 128Kx72 21mmx25mm, 255 Ceramic Ball Grid Array (CBGA) Core Frequency/L2 Cache Frequency (300MHz/ 150MHz, 350MHz/175MHz) Maximum 60x Bus frequency = 66MHz.

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