The K7J641882M by Samsung semiconductor is a (K7J641882M / K7J643682M) 72Mb M-die DDRII SRAM Specification. Below is the official datasheet preview.
| Part number | K7J641882M |
|---|---|
| Manufacturer | Samsung semiconductor |
| File Size | 361.01 KB |
| Description | (K7J641882M / K7J643682M) 72Mb M-die DDRII SRAM Specification |
| Datasheet |
 K7J641882M_Samsungsemiconductor.pdf
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Input Clock Input Clock for Output Data Output Echo Clock DLL Disable when low Address Inputs Data Inputs 1 NOTE Q0-35 Data Outputs Read, Write Control Pin, Read active when high Synchronous Load Pin, bus Cycle sequence is to be defined when low Block Write Control Pin,active when low Input Reference Voltage Output Driver Impedance Control Input Power Supply ( 1.8 V ) Output Power Supply ( 1.5V or 1.8V ) Ground JTAG Test Mode Select JTAG Test Data Input JTAG Test Clock JTAG Test Data Output No
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