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K4S560432B 256Mbit SDRAM 16M x 4bit x 4 Banks Synchronous DRAM LVTTL

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Description

K4S560432B CMOS SDRAM 256Mbit SDRAM 16M x 4bit x 4 Banks Synchronous DRAM LVTTL Revision 0.2 May.2000 * Samsung Electronics reserves the righ.
The K4S560432B is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,785,216 words by 4 bits, fabricated with SAMSUNG's high.

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Datasheet Specifications

Part number
K4S560432B
Manufacturer
Samsung semiconductor
File Size
130.41 KB
Datasheet
K4S560432B_Samsungsemiconductor.pdf
Description
256Mbit SDRAM 16M x 4bit x 4 Banks Synchronous DRAM LVTTL

Features

* JEDEC standard 3.3V power supply
* LVTTL compatible with multiplexed address
* Four banks operation
* MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)
* All inputs are

Applications

* ORDERING INFORMATION Max Freq. 133MHz(CL=3) 100MHz(CL=2) 100MHz(CL=3) LVTTL Interface Package 54pin TSOP(II) FUNCTIONAL BLOCK DIAGRAM I/O Control LWE LDQM Data Input Register Bank Select 16M x 4 Sense AMP 16M x 4 16M x 4 16M x 4 Refresh Counter Output Buffer Row Decoder Row Buffer DQi Ad

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