PCS3P623Z05A - Timing-Safe Peak EMI reduction IC

PCS3P623Z05A Datasheet Preview — Preview of PCS3P623Z05A PDF

Datasheet Details

Part number	PCS3P623Z05A
Manufacturer	PulseCore Semiconductor
File Size	580.80 KB
Description	Timing-Safe Peak EMI reduction IC
Datasheet	PCS3P623Z05A_PulseCoreSemiconductor.pdf

PCS3P623Z05A Product details

Description

PCS3P623Z05/09 is a versatile, 3.3V Zero-delay buffer memory interface systems.General Block Diagram PLL CLKIN DLY_CTRL CLKOUT1 CLKOUT2 CLKOUT3 PLL CLKIN MUX DLY_CTRL CLKOUTA1 CLKOUTA2 CLKOUTA3 CLKOUTA4 PCS3P623Z05A/B CLKOUT4 S2 S1 Select Input Decoding CLKOUTB1 CLKOUTB2 CLKOUTB3 PCS3P623Z09A/B CLKOUTB4 PulseCore Semiconductor Corporation 1715 S.Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Notice: The informa

Features

Clock distribution with Timing-Safe™ Peak EMI Reduction Input frequency range: 20MHz - 50MHz Multiple low skew Timing-safe™ Outputs: PCS3P623Z05: 5 Outputs PCS3P623Z09: 9 Outputs.
External Input-Output Delay Control option Supply Voltage: 3.3V±0.3V Commercial and Industrial temperature range Packaging Information: ASM3P623Z05: 8 pin SOIC, and TSSOP ASM3P623Z09:16 pin SOIC, and TSSOP.
True Drop-in Solution for Zero Dela.

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Published: Feb 16, 2011 |