PLL103-11 Datasheet (PhaseLink Corporation)

PLL103-11, Low Skew Buffers

Name SDRAM (0:5) SDRAM (6:11) SDRAM 12 www.DataSheet4U.com BUF_IN Number 2,3,6,7,10,11 18,19,22, 23,26,27 12 9 14 15 1,5,20,24,28 13 4,8,17,21,25 16 Type O O O I B I P P P P SDRAM Byte0 Clock outputs.

SDRAM Byte1 Clock outputs.

SDRAM Byte2 Clock outputs.

Description Input for fanout buffers SDR

PLL103-11 Features

* Generates 13 copies of High-speed clock inputs. Supports up to three SDRAM DIMMS synchronous clocks.

* Supports 2-wire I2C serial bus interface with readback.

* 50% duty cycle with low jitter.

* Less than 5ns delay. www.DataSheet4U.com

* Skew between any outputs is le