PLL103-06 Datasheet (PhaseLink Corporation)

PLL103-06, DDR SDRAM Buffer

The PLL103-06 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications.

The device has 12 outputs.

These outputs can be configured to support 3 unbuffered standard SDR (Single Data Rate) DIMMS and 2 DDR DIMMS.

The PLL103-06 can be used in conjunction with the PLL202-04 o

PLL103-06 Features

* Generates 12-output buffers from one input. Supports up to 2 DDR DIMMS or 3 SDRAM DIMMS.

* Supports 266MHz DDR SDRAM.

* One additional output for feedback.

* Less than 5ns delay.

* Skew between any outputs is less than 100 ps. www.DataSheet4U.com

* 2.5V or 3.3