74LS175 Datasheet (ON Semiconductor)

74LS175, LOW POWER SCHOTTKY

The LS175 consists of four edge-triggered D flip-flops with individual D inputs and Q and Q outputs.

The Clock and Master Reset are common.

The four flip-flops will store the state of their individual D inputs on the LOW to HIGH Clock (CP) transition, causing individual Q and Q outputs to follow.

SN74LS175 Quad D Flip-Flop The LSTTL / MSI SN74LS175 is a high speed Quad D Flip-Flop.

The device is useful for general flip-flop requirements where clock and clear inputs are common.

The information on the D inputs is stored during the LOW to HIGH clock transition.

Both true and complemented outputs of each flip-flop are provided.

A Master Reset input resets all flip-flops, independent of the Clock or D inputs, when LOW.

The LS175 is fabricated with the Schottky barrier diode process for high s

74LS175 Features

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