MM54HC76 Datasheet - National

MM54HC76 Dual J-K Flip-Flops

These high speed (30 MHz minimum) J-K Flip-Flops utilize advanced silicon-gate CMOS technology to achieve the low power consumption and high noise immunity of standard CMOS integrated circuits along with the ability to drive 10 LS-TTL loads Each flip-flop has independent J K PRESET CLEAR and CLOCK i.

MM54HC76 Features

* Y Y Y Y Y Typical propagation delay 16 ns Wide operating voltage range Low input current 1 mA maximum Low quiescent current 40 mA maximum (74HC Series) High output drive 10 LS-TTL loads Connection and Logic Diagrams Dual-In-Line Package Truth Table Inputs PR L H L H H H H H CLR H L L H H H H H C

MM54HC76 Datasheet (136.21 KB)