This TRI-STATE bidirectional buffer utilizes advanced silicon-gate CMOS technology and is intended for two-way asynchronous communication between data buses It has high drive current outputs which enable high speed operation even when driving large bus capacitances This circuit possesses the low pow
Features
Y Y Y Y
Y Y
Typical propagation delay 13 ns Wide power supply range 2.
6V Low quiescent current 80 mA maximum (74 HC) TRI-STATE outputs for connection to bus oriented systems High output drive 6 mA (minimum) Same as the ’645
Connection Diagram
Dual-In-Line Package
TL F 5165.
1
Top View Order Number MM54HC245A or MM74HC245A
Truth Table
Control Inputs G L L H DIR L H X B data to A bus A data to B bus Isolation Operation
H e high level L e low level X e irrelevant
TRI-STAT.
The following content is an automatically extracted verbatim text
from the original manufacturer datasheet and is provided for reference purposes only.
View original datasheet text
MM54HC245A MM74HC245A Octal TRI-STATE Transceiver
January 1988
MM54HC245A MM74HC245A Octal TRI-STATE Transceiver
General Description
This TRI-STATE bidirectional buffer utilizes advanced silicon-gate CMOS technology and is intended for two-way asynchronous communication between data buses It has high drive current outputs which enable high speed operation even when driving large bus capacitances This circuit possesses the low power consumption and high noise immunity usually associated with CMOS circuitry yet has speeds comparable to low power Schottky TTL circuits This device has an active low enable input G and a direction control input DIR When DIR is high data flows from the A inputs to the B outputs When DIR is low data flows from the B inputs to the A outputs The MM54HC245A MM74HC2
MM54HC245A Datasheet
