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DS92LV1021 - 16-40 MHz 10 Bit Bus LVDS Serializer/Deserializer

Description

The DS92LV1021 transforms a 10-bit wide parallel CMOS/ TTL data bus into a single high speed Bus LVDS serial data stream with embedded clock.

The DS92LV1210 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide parallel data bus and separates clock.

Features

  • n n n n n n n n n n Guaranteed transition every data transfer cycle Single differential pair eliminates multi-channel skew Flow-through pinout for easy PCB layout 400 Mbps serial Bus LVDS bandwidth (at 40 MHz clock) 10-bit parallel interface for 1 byte data plus 2 control bits Synchronization mode and LOCK indicator Programmable edge trigger on clock High impedance on receiver inputs when power is off Bus LVDS serial output rated for 27Ω load Small 28-lead SSOP package-MSA Block Diagrams DS100.

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📁 Similar Datasheet

Part Number Description Manufacturer
DS92LV1021 LVDS Serializer/Deserializer Texas Instruments
DS92LV1210 LVDS Serializer/Deserializer Texas Instruments
DS92LV1260 Six Channel 10 Bit BLVDS Deserializer Texas Instruments
DS92LV16 16-Bit Bus LVDS Serializer/Deserializer Texas Instruments
DS92LV18 18-Bit Bus LVDS Serializer/Deserializer Texas Instruments

Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
DS92LV1021A 16-40 MHz 10 Bit Bus LVDS Serializer
DS92LV1023 40-66 MHz 10 Bit Bus LVDS Serializer/Deserializer
DS92LV1212 16-40 MHz 10-Bit Bus LVDS Random Lock Deserializer
DS92LV1224 40-66 MHz 10 Bit Bus LVDS Serializer/Deserializer
DS92LV1260 Six Channel 10 Bit BLVDS Deserializer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS92LV1021/DS92LV1210 16-40 MHz 10 Bit Bus LVDS Serializer and Deserializer March 1999 DS92LV1021 and DS92LV1210 16-40 MHz 10 Bit Bus LVDS Serializer and Deserializer General Description The DS92LV1021 transforms a 10-bit wide parallel CMOS/ TTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. The DS92LV1210 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide parallel data bus and separates clock. The DS92LV1021 may transmit data over heavily loaded backplanes or 10 meters of cable. The reduced cable, PCB trace count and connector size saves cost and makes PCB design layout easier. Clock-to-data and data-to-data skew are eliminated since one output will transmit both clock and all data bits serially.
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