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DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the other inputs and makes the Q output LOW.
The SN54 / 74LS107A is the same as the SN54 / 74LS73A but has corner power pins.
SN54/74LS107A
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC CD1 CP1 14 13 12
K2 11
CD2 CP2 10 9
J2 8
1234567 J1 Q1 Q1 K1 Q2 Q2 GND
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
SN74LS107A Datasheet
