HY57V56820CLT Features
* Single 3.3±0.3V power supply All device pins are compatible with LVTTL interface JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin pitch All inputs and outputs referenced to positive edge of system clock Data mask function by DQM Internal four banks operation
HY57V56820CT_HynixSemiconductor.pdf
Datasheet Details
HY57V56820CLT, HY57V56820CT
Hynix Semiconductor
108.92 KB
4 banks x 8m x 8bit synchronous dram.
This datasheet PDF includes multiple part numbers: HY57V56820CLT, HY57V56820CT.
Please refer to the document for exact specifications by model.
📁 Related Datasheet
HY57V56820CT 4 Banks x 8M x 8Bit Synchronous DRAM (Hynix Semiconductor)
HY57V56820BLT 4 Banks x 8M x 8Bit Synchronous DRAM (Hynix Semiconductor)
HY57V56820BT 4 Banks x 8M x 8Bit Synchronous DRAM (Hynix Semiconductor)
HY57V561620 4Banks x 4M x 16Bit Synchronous DRAM (Hynix Semiconductor)
HY57V561620BLT-H DRAM (Pioneer)
HY57V561620BLT-I 4 Banks x 4M x 16Bit Synchronous DRAM (Hynix Semiconductor)
HY57V561620BT-I 4 Banks x 4M x 16Bit Synchronous DRAM (Hynix Semiconductor)
HY57V561620CLT 4 Banks x 4M x 16Bit Synchronous DRAM (Hynix Semiconductor)
HY57V56820CLT Distributor
