Description
Architecture
The CY7C138AV/144AV/006AV/007AV and CY7C139AV/ 145AV/016AV/017AV consist of an array of 4K, 8K, 16K, and 32K words of 8 and 9 bits each of dual-port RAM cells, I/O and address lines, and control signals (CE, OE, R/W).These control pins permit independent access for reads or writes to any location in memory.To handle simultaneous writes/reads to the same location, a BUSY pin is provided on each port.Two interrupt (INT) pins can be utilized for port-to-port communication.Two sema
Features
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- True Dual-Ported memory cells which allow simultaneous access of the same memory location.
- 4K/8K/16K/32K x 8 organizations (CY7C0138AV/144AV/006AV/007AV).
- 4K/8K/16K/32K x 9 organizations (CY7C0139AV/145AV/016AV/017AV).
- 0.35-micron CMOS for optimum speed/power.
- High-speed access: 20/25 ns.
- Low operating power.
- Active: ICC = 115 mA (typical)
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CY7C138AV/144AV/006AV CY7C139AV/145AV/016AV CY7.