Datasheet4U Logo Datasheet4U.com

CY7C1392KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture

📥 Download Datasheet  Datasheet Preview Page 1

Description

CY7C1392KV18 CY7C1393KV18 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture 18-Mbit DDR II SIO SRAM Two-Word Burst Architecture .

📥 Download Datasheet

Preview of CY7C1392KV18 PDF
datasheet Preview Page 2 datasheet Preview Page 3

Datasheet Specifications

Part number
CY7C1392KV18
Manufacturer
Cypress Semiconductor
File Size
587.97 KB
Datasheet
CY7C1392KV18-CypressSemiconductor.pdf
Description
18-Mbit DDR II SIO SRAM Two-Word Burst Architecture

Features

* 18-Mbit density (2M × 8, 1M × 18)
* 333-MHz clock for high bandwidth
* Two-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces (data transferred at 666 MHz) at 333 MHz
* Two input clocks (K and K) for precise DDR timing
* SRAM uses rising edges

CY7C1392KV18 Distributors

📁 Related Datasheet

📌 All Tags

Cypress Semiconductor CY7C1392KV18-like datasheet