Datasheet4U Logo Datasheet4U.com

CY7C1392BV18 - 1.8V Synchronous Pipelined SRAM

CY7C1392BV18 Description

CY7C1392BV18, CY7C1992BV18 CY7C1393BV18, CY7C1394BV18 18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture .

CY7C1392BV18 Features

* 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36)
* 300 MHz clock for high bandwidth
* 2-word burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces (data transferred at 600 MHz) at 300 MHz
* Two input clocks (K and K) for precise DDR timing
* SRAM

📥 Download Datasheet

Preview of CY7C1392BV18 PDF
datasheet Preview Page 2 datasheet Preview Page 3

Datasheet Details

Part number
CY7C1392BV18
Manufacturer
Cypress Semiconductor
File Size
386.82 KB
Datasheet
CY7C1392BV18-CypressSemiconductor.pdf
Description
1.8V Synchronous Pipelined SRAM

📁 Related Datasheet

  • CY7C131AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C131E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C136AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C136E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C1370C - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
  • CY7C1370CV25 - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
  • CY7C1370D - 18-Mbit (512 K 횞 36/1 M 횞 18) Pipelined SRAM (Cypress)
  • CY7C1371C - 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture (Cypress)

📌 All Tags

1.8V Synchronous Pipelined SRAM Cypress Semiconductor
Cypress Semiconductor CY7C1392BV18-like datasheet