CY2SSTV16859 Datasheet (Cypress Semiconductor) - 13-Bit to 26-Bit Registered Buffer PC2700-/PC3200-Compliant

CY2SSTV16859, 13-Bit to 26-Bit Registered Buffer PC2700-/PC3200-Compliant

This 13-bit to 26-bit registered buffer is designed for 2.3V to 2.7 VDD operations.

All inputs are compatible with the JEDEC Standard for SSTL-2, except the LVCMOS reset (RESET#) input.

All outputs are SSTL_2, Class II compatible.

Block Diagram Pin Configuration RESET # CLK CLK # D1 D VREF C R Q

CY2SSTV16859 Features

* Differential clock inputs up to 280 MHz

* Supports LVTTL switching levels on the RESET# pin

* Output drivers have controlled edge rates, so no external resistors are required.

* Two KV ESD protection

* Latch-up performance exceeds 100 mA per JESD78, Class II