Description
The CY2DM1502 is an ultra-low noise, low-skew, low-propagation delay 1:2 CML, HCSL, or LVPECL to CML fanout buffer targeted to meet the requirements of high-speed clock distribution applications.
Features
- One current mode logic (CML), High-speed current steering logic (HCSL), or low-voltage positive emitter-coupled logic (LVPECL) input pair distributed to two CML output pairs.
- 20-ps maximum output-to-output skew.
- 480-ps maximum propagation delay.
- 0.15-ps maximum additive RMS phase jitter at 156.25 MHz
(12-kHz to 20-MHz offset).
- Up to 1.5 GHz operation.
- 8-pin thin shrunk small outline package (TSSOP) package.
- 2.5-V or 3.3-V operating voltage [1].
- Commercial.
CY2DM1502-CypressSemiconductor.pdf
