CY2DP3110 - Differential Clock/Data Fanout Buffer

Name: CY2DP3110
SKU: CY2DP3110-564392

Cypress Semiconductor

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Datasheet Details

Part number	CY2DP3110
Manufacturer	Cypress Semiconductor
File Size	304.77 KB
Description	Differential Clock/Data Fanout Buffer
Datasheet	CY2DP3110_CypressSemiconductor.pdf

CY2DP3110 Product details

Description

The CY2DP3110 is a low-skew, low propagation delay 2-to-10 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.

Features

Ten ECL/PECL differential outputs.
One ECL/PECL differential or single-ended inputs (CLKA).
One HSTL differential or single-ended inputs (CLKB).
Hot-swappable/-insertable.
50 ps output-to-output skew.
150 ps device-to-device skew.
400 ps propagation delay (typical).
1.2 ps RMS period jitter (max. ).
1.5 GHz Operation (2.7 GHz maximum toggle frequency).
PECL and HSTL mode supply range: VCC = 2.5V± 5% to 3.3V.

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Other Datasheets by Cypress Semiconductor

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Published: Dec 20, 2006 |