CY2DP1502 Datasheet (Cypress Semiconductor)

CY2DP1502, 1:2 LVPECL Fanout Buffer

The CY2DP1502 is an ultra-low noise, low-skew, low-propagation delay 1:2 LVPECL fanout buffer targeted to meet the requirements of high-speed clock distribution applications.

The device has a fully differential internal architecture that is optimized to achieve low additive jitter and low skew at op

CY2DP1502 Features

* One differential (LVPECL, LVDS, HCSL, or CML) input pair distributed to two LVPECL output pairs

* Translates any single-ended input signal to 3.3 V LVPECL levels with resistor bias on INx# input

* 20-ps maximum output-to-output skew

* 480-ps maximum propagation delay

* 0.15-ps