AS4C1G8D3LA 8Gbit DDR3L SDRAM

Alliance Semiconductor

Description

Revision History 8Gbit DDR3L SDRAM 8 BANKS X 128Mbit X 8 - Dual Die Package (DDP) 78ball FBGA Package Revision Details Rev 1.0 Preliminary datasheet .
Pin CK, CK CKE CS ODT RAS, CAS, WE DM BA0 - BA2 A0 - A15 A10 / AP A12 / BC RESET DQ DQS, DQS NC Type Input Input Input Input Input Input Input Input.

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Datasheet Specifications

Part number: AS4C1G8D3LA
Manufacturer: Alliance Semiconductor
File Size: 2.14 MB
Datasheet: AS4C1G8D3LA-AllianceSemiconductor.pdf
Description: 8Gbit DDR3L SDRAM

Features

* - Double-data-rate architecture; two data transfers per clock cycle - The high-speed data transfer is realized by the 8 bits prefetch pipe- lined architecture - Bi-directional differential data strobe (DQS and DQS) is transmitted/ received with data for capturing data at the receiver - DQS is edge-a

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AS4C1G8D3LA 8Gbit DDR3L SDRAM Alliance Semiconductor

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