Datasheet Details
| Part number | 74AUP1T97 |
|---|---|
| Manufacturer | Nexperia |
| File Size | 276.04 KB |
| Description | Low-power configurable gate |
| Datasheet |
 74AUP1T97 Datasheet
|
|
|
Description
The 74AUP1T97 is a configurable multiple function gate with level translating, Schmitt-trigger inputs.
The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3-bit input.
All inputs can be connected directly to VCC or GND.
Features
- Wide supply voltage range from 2.3 V to 3.6 V.
- CMOS low power dissipation.
- High noise immunity.
- Overvoltage tolerant inputs to 3.6 V.
- Low noise overshoot and undershoot < 10 % of VCC.
- IOFF circuitry provides partial power-down mode operation.
- Latch-up performance exceeds 100 mA per JESD 78 Class II.
- Low static power consumption; ICC = 1.5 μA (maximum).
- Complies with JEDEC standards:.
- JESD8-12 (0.8 V to 1.3.