SN74SSTVF16857 datasheet, buffer equivalent, Texas Instruments

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Application

D Output Edge-Control Circuitry Minimizes Switching Noise in Unterminated DIMM Load D Outputs Meet SSTL_2 Class I Specif.

Description

ordering information This 14-bit registered buffer is designed for 2.3-V to 2.7-V VCC operation. All inputs are SSTL_2, except the LVCMOS reset (RESET) input. All outputs are edge-controlled circuits optimized for unterminated DIMM loads and meet SST.

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