LMK04610 cleaner equivalent, ultra-low noise and low power jesd204b compliant clock jitter cleaner.
*1 Dual-loop PLL architecture
* Ultra low noise (10 kHz to 20 MHz):
– 48-fs RMS jitter at 1966.08 MHz
– 50-fs RMS jitter at 983.04.
* Wireless infrastructure like LTE-BTS, small cells, remote radio units (RRU)
* Data converter and integrated tr.
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