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LMK04031 - Family Low-Noise Clock Jitter Cleaner

Download the LMK04031 datasheet PDF (LMK04000 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for family low-noise clock jitter cleaner.

Description

The LMK04000 family of precision clock conditioners provides low-noise jitter cleaning, clock multiplication and distribution without the need for high-performance voltage controlled crystal oscillators (VCXO) module.

Features

  • 1.
  • 23 Cascaded PLLatinum™ PLL Architecture.
  • PLL1.
  • Phase Detector Rate of up to 40 MHz.
  • Integrated Low-Noise Crystal Oscillator Circuit.
  • Dual Redundant Input Reference Clock with LOS.
  • PLL2.
  • Normalized [1 Hz] PLL Noise Floor of 224 dBc/Hz.
  • Phase Detector Rate up to 100 MHz.
  • Input Frequency-Doubler.
  • Integrated Low-Noise VCO.
  • Ultra-Low RMS Jitter Performance.
  • 150 fs RMS Jitter (12 kHz.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (LMK04000-etcTI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by Texas Instruments
  • LMK04033 - Family Low-Noise Clock Jitter Cleaner
  • LMK04000 - Family Low-Noise Clock Jitter Cleaner
  • LMK04001 - Family Low-Noise Clock Jitter Cleaner
  • LMK04002 - Family Low-Noise Clock Jitter Cleaner
  • LMK04010 - Family Low-Noise Clock Jitter Cleaner
  • LMK04011 - Family Low-Noise Clock Jitter Cleaner
  • LMK04100 - Family Clock Jitter Cleaner
  • LMK04101 - Family Clock Jitter Cleaner

Full PDF Text Transcription

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