Description
The ZL30102 DS1/E1 Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization for DS1/E1 transmission equipment deploying redundant network clocks.
Features
- Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock.
- Supports Telcordia GR-1244-CORE Stratum 4 and 4E.
- Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces.
- Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces.
- Simple hardware control interface.
- Manual and Automatic hitless reference switching between any combination o.
ZL30102 Datasheet
