Datasheet Details
| Part number | ZL30101 |
|---|---|
| Manufacturer | Zarlink Semiconductor Inc |
| File Size | 421.69 KB |
| Description | T1/E1 Stratum 3 System Synchronizer |
| Datasheet |
 ZL30101 Datasheet
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General Description
The ZL30101 Stratum 3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization for multi-trunk T1 and E1 transmission equipment.
Key Features
- April 2010.
- Supports Telcordia GR-1244-CORE Stratum 3.
- Supports G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces.
- Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces.
- Simple hardware control interface.
- Accepts two input references and synchronizes to any combination of 8 kHz, 1.544 MHz, 2.048 MHz, 8.192 MHz or 16.384 MHz inputs.
- Provides a range of clock outputs: 1.544 MHz, 2.048 MHz, 16.384 MHz and either 4.