K7B321825M sram equivalent, 1mx36 & 2mx18 synchronous sram.
* Synchronous Operation.
* On-Chip Address Counter.
* Self-Timed Write Cycle.
* On-Chip Address and Control Registers.
* 3.3V+0.165V/-0.165V Power Sup.
G W, B W, LBO, ZZ. Write cycles are internally selftimed and synchronous. Full bus-width write is done by GW, and each .
The K7B323625M and K7B321825M are 37,748,736-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System. It is organized as 1M(2M) words of 36(18) bits and integrates address and .
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