HD74HC164 Datasheet | Renesas

8-bit Parallel-out Shift Register REJ03D0580-0400 Rev.4.00 Mar 25, 2009 Description This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-flop. Inputs A & B permit plete control over the ining data. A low at either or both inputs inhibits entry of new data and resets the first flip-flop to the low level at the next clock pulse. A high level on the input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup and hold time requirements will be entered. Data is serially shifted in and out of the 8-bit register during the positive going transition of the clock pulse. Clear is independent of the clock and acplished by a low level at the clear input. Features - High Speed Operation: tpd (Clock to Q) = 14.5 ns typ (CL = 50 p F) - High Output Current: Fanout of 10 LSTTL Loads - Wide Operating Voltage: VCC = 2 to 6 V - Low Input Current: 1 µA max - Low Quiescent Supply Current: ICC (static) = 4 µA max - Ordering Information Part Name Package Type Package Code (Previous Code) HD74HC164P DILP-14 pin PRDP0014AB-B (DP-14AV) HD74HC164FPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) HD74HC164RPEL SOP-14 pin (JEDEC) PRSP0014DE-A (FP-14DNV) Note: Please consult the sales office for the above package availability. Package Abbreviation Taping Abbreviation (Quantity) - FP EL (2,000 pcs/reel) RP EL (2,500 pcs/reel) Function...