QL3004
QL3004 is PLD Gate pASIC 3 FPGA Combining High Performance and High Density manufactured by QuickLogic Corporation.
QL3004 pASIC 3 FPGA Data Sheet
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4,000 Usable PLD Gate pASIC 3 FPGA bining High Performance and High Density
Device Highlights
High Performance & High Density
- 4,000 Usable PLD Gates with 74 I/Os
- 300 MHz 16-bit ..
Eight Low-Skew Distributed Networks
- Two array clock/control networks available
Counters, 400 MHz Datapaths
- 0.35 µm four-layer metal non-volatile CMOS process for smallest die sizes
Easy to Use / Fast Development Cycles
- 100% routable with 100% utilization and to the logic cell flip-flop clock, set and reset inputs
- each driven by an input-only pin
- Six global clock/control networks available to the logic cell; F1, clock set, reset inputs...
