NB3L204K Datasheet | onsemi

2.5V, 3.3V Differential 1:4 HCSL Fanout Buffer Description The NB3L204K is a differential 1:4 Clock fanout buffer with High- speed Current Steering Logic (HCSL) outputs. Inputs can directly accept differential LVPECL, LVDS, and HCSL signals. Single- ended LVPECL, HCSL, LVCMOS, or LVTTL levels are accepted with a proper external Vth reference supply per Figures 4 and 6. The input signal will be translated to HCSL and provides four identical copies operating up to 350 MHz. The NB3L204K is optimized for ultra- low phase noise, propagation delay variation and low output- to- output skew, and is DB400H pliant. As such, system designers can take advantage of the NB3L204K’s performance to distribute low skew clocks across the backplane or the motherboard making it ideal for Clock and Data distribution applications such as PCI Express, FBDIMM, Networking, Mobile puting, Gigabit Ethernet, etc. Output drive current is set by connecting a 475 W resistor from IREF (Pin 14) to GND per Figure 11. Outputs can also interface to LVDS receivers when terminated per Figure 12. Features - Maximum Input Clock Frequency > 350 MHz - 2.5 V ±5% / 3.3 V ±10% Supply Voltage Operation - 4 HCSL Outputs - DB400H pliant - Individual OE Control Pin for Each Output - 100 ps Max Output- to- Output Skew Performance - 1 ns Typical Propagation Delay - 500 ps Typical Rise and Fall Times - 80 fs Maximum Additive RMS Phase Jitter - - 40°C to +85°C Ambient Operating Temperature - QFN 24- pin Package, 4 mm x 4 mm - These Devices are Pb- Free and are Ro HS pliant Typical Applications - PCI Express - FBDIMM - Mobile puting - Networking - Gigabit Ethernet .onsemi. MARKING DIAGRAM 1 QFN24 4x4 CASE 485DJ NB3L 204K...