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NT5CB256M4AN Datasheet Nanya

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Nanya · File Size : 2.27MB NT5CB256M4AN · star-11

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and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and  fallin.

NT5CB256M4AN NT5CB256M4AN NT5CB256M4AN
TAGS
1Gb
DDR3
SDRAM
A-Die
NT5CB256M4AN
NT5CB256M16BP
NT5CB256M16CP

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