NT5CB256M16DP - Industrial and Automotive DDR3(L) 4Gb SDRAM

This page provides the datasheet information for the NT5CB256M16DP, a member of the NT5CC512M8DN Industrial and Automotive DDR3(L) 4Gb SDRAM family.

Datasheet Summary

JEDEC DDR3 Compliant - 8n Prefetch Architecture - Differential Clock(CK/) and Data Strobe(DQS/) - Double-data rate on DQs, DQS and DM.
Data Integrity - Auto Self Refresh (ASR) by DRAM built-in TS - Auto Refresh and Self Refresh Modes.
Power Saving Mode - Partial Array Self Refresh (PASR)1 - Power Down Mode.
Signal Integrity - Configurable DS for system compatibility - Configurable On-Die Termination - ZQ Calibration for DS/ODT impedance accuracy via external ZQ pad (2.

Nanya

Part number	NT5CB256M16DP
Manufacturer	Nanya
File Size	3.37 MB
Description	Industrial and Automotive DDR3(L) 4Gb SDRAM
Datasheet	NT5CB256M16DP Datasheet
Additional preview pages of the NT5CB256M16DP datasheet.

Other Datasheets by Nanya

Click to expand full text

DDR3(L) 4Gb SDRAM NT5CB(C)512M8DN / NT5CB(C)256M16DP Nanya Technology Corp.

Published: Oct 17, 2018 |