IDT5T915 terabuffer equivalent, 2.5v differential 1:5 clock buffer terabuffer.
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IDT5T915
DESCRIPTION:
Guaranteed Low Skew < 25ps (max) Very low duty cycle distortion < 300ps (max) High speed propaga.
FUNCTIONAL BLOCK DIAGRAM
TxS GL
G(+)
OUTPUT CONTROL
Q1
OUTPUT CONTROL
Q1
OUTPUT CONTROL
Q2
RxS A A/VREF OUTPUT.
Guaranteed Low Skew < 25ps (max) Very low duty cycle distortion < 300ps (max) High speed propagation delay < 2ns (max) Up to 250MHz operation Very low CMOS power levels Hot insertable and over-voltage tolerant inputs 3-level inputs for selectable i.
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