Datasheet4U Logo Datasheet4U.com

HY5DU283222F - 128M(4Mx32) GDDR SDRAM

Description

and is subject to change without notice.

Hynix Electronics does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

  • 2.5V +/- 5% VDD and VDDQ power supply supported up to 300/275/250/200MHz 2.9V +/- 5% VDD and VDDQ power supply supported up to 350/375MHz All inputs and outputs are compatible with SSTL_2 interface 12mm x 12mm, 144ball FBGA with 0.8mm pin pitch Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS0 ~ DQS3) Data ou.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
HY5DU281622 4 Banks x 2M x 16Bit Double Data Rate SDRAM Hyundai
HY5DU281622FTP 128Mb DDR SDRAM Hynix
HY5DU281622LT-H 4 Banks x 2M x 16Bit Double Data Rate SDRAM Hyundai
HY5DU281622LT-K 4 Banks x 2M x 16Bit Double Data Rate SDRAM Hyundai
HY5DU281622LT-L 4 Banks x 2M x 16Bit Double Data Rate SDRAM Hyundai

Other Datasheets by SK Hynix

Part Number Description
HY5DU283222AF 128M(4Mx32) GDDR SDRAM
HY5DU283222BF 128M(4Mx32) GDDR SDRAM
HY5DU283222BFP 128M(4Mx32) GDDR SDRAM
HY5DU283222Q 128M(4Mx32) GDDR SDRAM
HY5DU281622AT (HY5DU28xxxAT) 3rd 128M DDR SDRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com HY5DU283222F 128M(4Mx32) GDDR SDRAM HY5DU283222F This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.2/Sep. 02 1 HY5DU283222F Rvision History Revision No. 0.4 History 1) Part Number changed from HY5DU283222F to HY6U22F 1) tAC/tDQSCK, tRCD/tRP parameters each speed changed as the followings a) tAC : changed from 0.7ns to 0.9ns at 3.3/4/4.5ns b) tDQSCK : changed from 0.6ns to 0.7ns at 3.3/4/4.5ns c) tRCD/tRP : changed from 5clk to 6clk at 3.3ns and 4clk to 5clk at 4/4.
Published: |