VDSS -8V RDS(ON) Max 5.7mΩ@VGS = -4.5V ID Max TA = +25°C -16A Description This 3rd generation Lateral MOSFET (LD-MOS) is engineered to minimize on-state losses and sw.

* DC-DC Converters
* Battery Management
* Load Switch
* Case: X2-DSN1515-9
* Terminal Connections: .

This 3rd generation Lateral MOSFET (LD-MOS) is engineered to minimize on-state losses and switch ultra-fast, making it ideal for high efficiency power transfer. It uses Chip-Scale Package (CSP) to increase power density by combining low thermal imped.

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