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CY7C1315BV18 Datasheet, Cypress Semiconductor

CY7C1315BV18 architecture equivalent, (cy7c1x1xbv18) 18-mb qdrtm-ii sram 4-word burst architecture.

CY7C1315BV18 Avg. rating / M : 1.0 rating-11

datasheet Download (Size : 529.85KB)

CY7C1315BV18 Datasheet

Features and benefits


* Separate Independent Read and Write data ports — Supports concurrent transactions
* 300-MHz clock for high bandwidth
* 4-Word Burst for reducing address bus.

Description

The CY7C1311BV18, CY7C1911BV18, CY7C1313BV18, and CY7C1315BV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports to access the memory array. The Read port has dedicated Data O.

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TAGS

CY7C1315BV18
CY7C1x1xBV18
18-Mb
QDRTM-II
SRAM
4-Word
Burst
Architecture
Cypress Semiconductor

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