CY7C1156V18 architecture equivalent, (cy7c11xxv18) sram 4-word burst architecture.
Separate Independent read and write data ports
* Supports concurrent transactions
* 300 MHz to 375 MHz clock for high bandwidth
* 4-Word Burst for reducing ad.
The CY7C1141V18, CY7C1156V18, CY7C1143V18, and CY7C1145V18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II+ architecture. QDR-II+ architecture consists of two separate ports to access the memory array. The read port has dedicated data out.
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