CD40105BMS December 1992 CMOS FIFO Register Description CD40105BMS is a low-power first-in-first-out (FIFO) “elastic” storage register that can store 1

Data sheet acquired from Harris Semiconductor SCHS096 PACKAGE OPTION ADDENDUM www.ti.com 4-Feb-2021 PACKAGING INFORMATION Orderable Device CD4010

FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC Datasheet Version 2.0 Document No.: FT_000288 Clearance No.: FTDI #199 Future Technol

Data sheet acquired from Harris Semiconductor SCHS096 PACKAGE OPTION ADDENDUM www.ti.com 4-Feb-2021 PACKAGING INFORMATION Orderable Device CD4010

74HC40105 4-bit x 16-word FIFO register Rev. 5 — 19 April 2019 Product data sheet 1. General description The 74HC40105 is a first-in/first-out (FIFO

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06

Data sheet acquired from Harris Semiconductor SCHS096 PACKAGE OPTION ADDENDUM www.ti.com 4-Feb-2021 PACKAGING INFORMATION Orderable Device CD4010

Data sheet acquired from Harris Semiconductor SCHS096 PACKAGE OPTION ADDENDUM www.ti.com 4-Feb-2021 PACKAGING INFORMATION Orderable Device CD4010

CMOS ASYNCHRONOUS FIFO 2,048 x 9, 4,096 x 9 8,192 x 9, 16,384 x 9 32,768 x 9 and 65,536 x 9 LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPI

FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC Datasheet Version 2.0 Document No.: FT_000288 Clearance No.: FTDI #199 Future Technol

CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K x 9, 2K x 9, 4K x 9 Integrated Device Technology, Inc. IDT72021 IDT72031 IDT72041 FEATURES: • First-In/Fir

áç OCTOBER 2003 ST16C1550/51 2.97V TO 5.5V UART WITH 16-BYTE FIFO REV. 4.2.0 GENERAL DESCRIPTION The ST16C1550 and ST16C1551 UARTs (here on denoted

S a t predecessor and reduces external component count, but also maintains a high degree of pin to its FT8U245AM a compatibility with the original, ma

2.5 VOLT HIGH-SPEED TeraSync™ FIFO 18-BIT/9-BIT CONFIGURATIONS 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9, 8,192 x 18/16,384 x 9, 16,384 x 18/32,768

STARTECH An Company ST16C2552 Printed December 17, 1996 DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs DESCRIPTION The ST16C2552 is a dual async

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74HC40105; 74HCT40105 4-bit x 16-word FIFO register Rev. 4 — 29 January 2016 Product data sheet 1. General description The 74HC40105; 74HCT40105 is

CY7C4425/4205/4215 CY7C4225/4235/4245 64/256/512/1K/2K/4K x 18 Synchronous FIFOs Features ■ High speed, low power, first-in first-out (FIFO) memories

áç APRIL 2002 XR16C2852 3.3V AND 5V DUART WITH 128-BYTE FIFO REV. 2.0.0 GENERAL DESCRIPTION The XR16C28521 (2852) is a dual universal asynchronous r