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SN74LVT8996ĆEP 3.3ĆV 10ĆBIT ADDRESSABLE SCAN PORT MULTIDROPĆADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVER
SCBS764 − SEPTEMBER 2003
D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification D Qualification Pedigree† D Member of the Texas Instruments (TI )
Broad Family of Testability Products Supporting IEEE Std 1149.1-1990 (JTAG) Test Access Port (TAP) and Boundary-Scan Architecture
D Extends Scan Access From Board Level to
Higher Levels of System Integration
D Promotes Reuse of Lower-Level
(Chip/Board) Tests in System Environment
D While Powered at 3.3 V, Both the Primary
and Secondary TAPs Are Fully 5-V Tolerant for Interfacing to 5-V and/or 3.