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SN74LVT8980AĆEP EMBEDDED TESTĆBUS CONTROLLER IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 8ĆBIT GENERIC HOST INTERFACES
SCBS761A − JUNE 2003 − REVISED OCTOBER 2003
D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification D Qualification Pedigree† D Member of Texas Instruments Broad Family
of Testability Products Supporting IEEE Std 1149.1-1990 (JTAG) Test Access Port (TAP) and Boundary-Scan Architecture
D Provide Built-In Access to IEEE Std 1149.1
Scan-Accessible Test/Maintenance Facilities at Board and System Levels
D While Powered at 3.3 V, the TAP Interface Is
Fully 5-V Tolerant for Mastering Both 5-V and/or 3.3-V IEEE Std 1149.1 Targets
D Simple Interface to Low-Cost 3.