Datasheet4U Logo Datasheet4U.com

SN74LVC2G79 - Dual Positive-Edge-Triggered D-Type Flip-Flop

Description

This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse.

Features

  • 1.
  • 2 Available in the Texas Instruments NanoFree™ Package.
  • Supports 5-V VCC Operation.
  • Inputs Accept Voltages to 5.5 V.
  • Max tpd of 4.2 ns at 3.3 V.
  • Low Power Consumption, 10-μA Max ICC.
  • ±24-mA Output Drive at 3.3 V.
  • Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C.
  • Ioff Feature Supports Live Insertion, PartialPower-Down Mode Oper.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
SN74LVC1G125 high performance non-inverting buffer UMW
SN74LVC1G34 Single buffer UMW
SN74L71 AND-Gate R-S Master-Slave F-F National Semiconductor
SN74L74N Dual D-Type Flip-Flop ETC
SN74LS00 QUAD 2-INPUT NAND GATE Motorola

Other Datasheets by Texas Instruments

Part Number Description
SN74LVC2G74 Single Positive-Edge-Triggered D-Type Flip-Flop
SN74LVC2G74-EP Single Positive-Edge-Triggered D-Type Flip-Flop
SN74LVC2G74-Q1 Single Positive-Edge-Triggered D-Type Flip-Flop
SN74LVC2G00 Dual 2-Input Positive-NAND Gate
SN74LVC2G00W-EP DUAL 2-INPUT POSITIVE-NAND GATE

Full PDF Text Transcription

Click to expand full text
SN74LVC2G79 www.ti.com SCES498E – OCTOBER 2003 – REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flop Check for Samples: SN74LVC2G79 FEATURES 1 •2 Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.2 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.
Published: |