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SN74LVC2G132 - Dual 2-Input NAND Gate

Description

This dual 2-input NAND gate with Schmitt-trigger inputs is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G132 contains two inverters and performs the Boolean function Y = A ⋅ B or Y = A + B in positive logic.

Features

  • 1.
  • 2 Available in Texas Instruments NanoFree™ Package.
  • Supports 5-V VCC Operation.
  • Inputs Accept Voltages to 5.5 V.
  • Max tpd of 5.3 ns at 3.3 V.
  • Low Power Consumption, 10-μA Max ICC.
  • ±24-mA Output Drive at 3.3 V.
  • Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C.
  • Ioff Supports Live Insertion, Partial Power Down Mode, and Back Drive.

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Full PDF Text Transcription

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SN74LVC2G132 www.ti.com SCES547D – FEBRUARY 2004 – REVISED DECEMBER 2013 Dual 2-Input NAND Gate With Schmitt-Trigger Inputs Check for Samples: SN74LVC2G132 FEATURES 1 •2 Available in Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 5.3 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection • Support Translation Down (5V to 3.3V and 3.3V to 1.
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