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SN74AUP1G74 - Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

Description

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications.

This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life.

Features

  • 1 Available in the Texas Instruments NanoStar™ Package.
  • Low Static-Power Consumption: ICC = 0.9 μA Maximum.
  • Low Dynamic-Power Consumption: Cpd = 5.5 pF Typical at 3.3 V.
  • Low Input Capacitance: Ci = 1.5 pF Typical.
  • Low Noise.
  • Overshoot and Undershoot < 10% of VCC.
  • Ioff Supports Partial-Power-Down Mode Operation.
  • Schmitt-Trigger Action Allows Slow Input Transition and Better Switching Noise Immunity at the Input (Vhys = 250 mV.

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Full PDF Text Transcription

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74AUP1G74 SCES644D – MARCH 2006 – REVISED DECEMBER 2015 SN74AUP1G74 Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset 1 Features •1 Available in the Texas Instruments NanoStar™ Package • Low Static-Power Consumption: ICC = 0.9 μA Maximum • Low Dynamic-Power Consumption: Cpd = 5.5 pF Typical at 3.3 V • Low Input Capacitance: Ci = 1.5 pF Typical • Low Noise – Overshoot and Undershoot < 10% of VCC • Ioff Supports Partial-Power-Down Mode Operation • Schmitt-Trigger Action Allows Slow Input Transition and Better Switching Noise Immunity at the Input (Vhys = 250 mV Typical at 3.3 V) • Wide Operating VCC Range of 0.8 V to 3.6 V • Optimized for 3.3-V Operation • 3.
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